发明名称 Process for measuring depth of source and drain
摘要 A process for measuring depth of a source and drain of a MOS transistor. The MOS transistor is formed on a semiconductor substrate on which a trench capacitor is formed and a buried strap is formed between the MOS transistor and the trench capacitor. The process includes the following steps. First, resistances of the buried strap at a plurality of different depths are measured. Next, a curve correlating the resistances with the depths is established. Next, slopes of the resistance to the depth for the curve are obtained. Finally, a depth corresponding to a minimum resistance before the slope of the resistance to the depth reaches to zero is obtained.
申请公布号 US6838866(B2) 申请公布日期 2005.01.04
申请号 US20020283699 申请日期 2002.10.30
申请人 NANYA TECHNOLOGY CORPORATION 发明人 TSAI TZU-CHING;MAO HUI MIN
分类号 H01L21/334;H01L21/66;H01L21/762;H01L21/8242;H01L23/544;H01L27/108;(IPC1-7):G01R31/26 主分类号 H01L21/334
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