LOW-POWER LOW-NOISE COMPARATOR HAVING AN INVERTER IN WHICH A PEAK CURRENT IS REDUCED TO INSTANTANEOUSLY REDUCE OVER-CURRENT IN A LOGIC THRESHOLD VOLTAGE

摘要

PURPOSE: A low-power low-noise comparator having an inverter in which a peak current is reduced is provided to instantaneously reduce over-current in a logic threshold voltage. CONSTITUTION: The first switch(SW1) blocks or outputs an inputted reference signal in response to logic states of the first clock signals. One end of the first capacitor(C1) is connected to an output terminal of the first switch, and the other end of the first capacitor is connected to a comparison input terminal. A low-power inverter(INV1) has a plurality of elements connected in series between the first power supply voltage and the second power supply voltage. The low-power inverter inverts the signal of the comparison input terminal, and outputs the inverted signal to a comparison output terminal. The low-power inverter differently sets current-voltage characteristic operating points when outputting a half signal of the first power supply voltage to the comparison output terminal by connection states of a plurality of the elements. The second switch(SW2) disconnects or connects between the comparison input terminal and the comparison output terminal in response to logic states of the second clock signals. The third switch(SW3) blocks or outputs an inputted lamp signal in response to logic states of the third clock signals. One end of the second capacitor(C2) is connected to an output terminal of the third switch, and the other end of the second capacitor is connected to the output terminal of the first switch.