| 发明名称 |
Data storage arrangement with control device and memory unit for computers and processors |
| 摘要 |
<p>The data storage arrangement has a control unit and a memory. Data, control, and address signals can be transmitted via data signal lines between the control device and the memory. If the total number of data signal lines is less than the total number of lines needed for transmission of the control and address signals, the arrangement has more than one memory. The number of memories is selected such that the total number of data lines is the same as the total number of lines needed to transmit the control and address signals.</p> |
| 申请公布号 |
DE10323415(A1) |
申请公布日期 |
2004.12.30 |
| 申请号 |
DE2003123415 |
申请日期 |
2003.05.23 |
| 申请人 |
INFINEON TECHNOLOGIES AG |
发明人 |
BRAUN, GEORG;RUCKERBAUER, HERMANN;KUZMENKA, MAKSIM;RAGHURAM, SIVA |
| 分类号 |
G06F13/16;G11C7/10;(IPC1-7):G11C7/10;G11C7/00 |
主分类号 |
G06F13/16 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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