发明名称 |
Automatic self test of an integrated circuit component via AC I/O loopback |
摘要 |
A multi-bit test value is loaded into a built-in latch of the IC component, and a pad of the component is selected for testing. A number of different sequences of test values are automatically generated, based on the stored test value, without scanning-in additional multi-bit values into the latch. A signal that is based on the different sequences of test values is driven into the selected pad and looped back. A difference between the test values and the looped back version of the test values is determined, while automatically adjusting driver and/or receiver characteristics to determine a margin of operation of on-chip I/O buffering for the selected pad. |
申请公布号 |
US2004267479(A1) |
申请公布日期 |
2004.12.30 |
申请号 |
US20030611099 |
申请日期 |
2003.06.30 |
申请人 |
QUERBACH BRUCE;ELLIS DAVID G.;KHAN AMJAD;TRIPP MICHAEL J.;GAYLES ERIC S.;GOLLAPUDI ESHWAR |
发明人 |
QUERBACH BRUCE;ELLIS DAVID G.;KHAN AMJAD;TRIPP MICHAEL J.;GAYLES ERIC S.;GOLLAPUDI ESHWAR |
分类号 |
G01R31/317;G01R31/3185;G06F11/27;(IPC1-7):G06F19/00 |
主分类号 |
G01R31/317 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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