发明名称 Operating system coordinated thermal management
摘要 A processor's performance state may be adjusted based on processor temperature. On transitions to a lower performance state due to the processor getting hotter, the processor's frequency is reduced prior to reducing the processor voltage. Thus, the processor's performance, as seen by the operating system, is reduced immediately. Conversely, on transitions to a higher performance state, due to the processor cooling down, the processor's frequency is not increased until the voltage is changed to a higher level. An interrupt event may be generated anytime the processor's phase locked loop relocks at a new frequency level. Thus, when the interrupt fires, the operating system can read the processor's performance state. As a result, interrupts are not generated that would cause processor performance to lag the interrupt event.
申请公布号 US2004268174(A1) 申请公布日期 2004.12.30
申请号 US20040900917 申请日期 2004.07.28
申请人 COOPER BARNES 发明人 COOPER BARNES
分类号 G06F1/20;G06F1/32;(IPC1-7):G06F1/08 主分类号 G06F1/20
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