发明名称 Method and circuitry for the functional testing and analysis of large digital circuits using hardware emulators
摘要 Starting from an unlimited number of events or conditions (1), (1') . . . (1<n>) together with there respective detectors (2), (2') . . . (2<n>) that are combined with a transition detector (3), that relieves information from the "external reactivation pin" (4) and via an external "system control" pin (5). It is possible to watch over both combinational and time events, or to be exact watch over combinational events during execution, and in combination with time dependence generate a flag or signal to register an event, freeze the circuit, communicate that an event has been produced and aid in the identification of the event and the analysis of the system from a graphical or similar user interface.
申请公布号 US2004268192(A1) 申请公布日期 2004.12.30
申请号 US20040497421 申请日期 2004.08.30
申请人 AGUIRRE ECHANOVE MIGUEL ANGEL;TOMBS JONATHAN;SILGADO ANTONIO TORRALBA;GARCIA FRANQUELO LEOPOLDO 发明人 AGUIRRE ECHANOVE MIGUEL ANGEL;TOMBS JONATHAN;SILGADO ANTONIO TORRALBA;GARCIA FRANQUELO LEOPOLDO
分类号 G01R31/3183;G06F11/26;(IPC1-7):G01R31/28 主分类号 G01R31/3183
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