Analog or multilevel DRAM cell having natural transistor

摘要

The circuit has a switch to activate a write operation to a DRAM cell, and a storage capacitor (21). A pass transistor (20) which is a natural transistor supports a read operation out of the DRAM cell. Another switch activates a read operation out of the DRAM cell. A constant current source (25) supports the read operation out of the DRAM cell. The source provides current for charging the capacitor. An independent claim is also included for a method to achieve a two-level DRAM cell.