发明名称 |
Method of forming double-gate semiconductor-on-insulator (SOI) transistors |
摘要 |
A method of forming a double gated SOI channel transistor comprising the following steps. A substrate having an SOI structure formed thereover is provided. The SOI structure including a lower SOI silicon oxide layer and an upper SOI silicon layer. The SOI silicon layer is patterned to form a patterned silicon layer. A dummy layer is formed over the SOI silicon oxide layer and the patterned SOI silicon layer. The dummy layer is patterned to form a damascene opening therein exposing: a portion of the lower SOI silicon oxide layer; and a central portion of the patterned SOI silicon layer to define a source structure and a drain structure. Patterning the exposed lower SOI silicon oxide layer to form a recess. Gate oxide layer portions are formed around the exposed portion of the patterned SOI silicon layer. A planarized layer portion is formed within the final damascene opening. The planarized layer portion including a bottom gate and a top gate. The patterned dummy layer is removed to form the double gated SOI channel transistor.
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申请公布号 |
US6835609(B1) |
申请公布日期 |
2004.12.28 |
申请号 |
US20030664210 |
申请日期 |
2003.09.17 |
申请人 |
CHARTERED SEMICONDUCTOR MANUFACTURING LTD. |
发明人 |
LEE YONG MENG;JIN DA;LAI MAU LAM;VIGAR DAVID;CHWA SIOW LEE |
分类号 |
H01L21/336;H01L29/423;H01L29/49;H01L29/786;(IPC1-7):H01L21/338;H01L27/01 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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