发明名称 Method and arrangement for testing a power output stage
摘要 An arrangement for testing a power output stage, with the power output stage includes at least one half bridge with an upper semiconductor switch and a lower semiconductor switch connected in series and to which an operating voltage is applied. A junction point between the semiconductor switches of the at least one half bridge forms an output. A control device performs a test to determine whether the voltage at the output is within a predetermined central tolerance band when the semiconductor switches are not switched on, a test to determine whether the voltage at the output is within a predetermined upper tolerance band when the upper semiconductor switch is switched on, and a test to determine whether the voltage at the output is within a predetermined lower tolerance band when the lower semiconductor switch is switched on. The power output stage is identified as being sound when all of the output voltages are within the respective tolerance bands.
申请公布号 US2004257017(A1) 申请公布日期 2004.12.23
申请号 US20040842119 申请日期 2004.05.10
申请人 SIEMENS AKTIENGESELLSCHAFT 发明人 BAY WOLFGANG;FISCHER PATRICK;HENNINGER MICHAEL
分类号 H02H7/08;(IPC1-7):H03F3/04 主分类号 H02H7/08
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