发明名称 MEMS micro-cap wafer level chip scale package
摘要 A wafer level, chip scale package suitable for a MEMS type device employs a solder bead between a protective cap and the chip substrate to hermetically seal active areas of the chip. Solder is electroplated onto a metallized layer on the cap through a photoresist mask that is subsequently removed to leave a solder bead patterned to completely surround the active chip areas. The cap is mounted on the chip substrate using a spacer to hold the cap and the substrate in spaced relationship while the cap is welded to the chip substrate using the solder bead. The spacer is subsequently removed, preferably during dicing of a wafer on which the chips are formed.
申请公布号 US2004256719(A1) 申请公布日期 2004.12.23
申请号 US20030600799 申请日期 2003.06.18
申请人 APTOS CORPORATION 发明人 LEI KUO LUNG
分类号 H01L23/10;(IPC1-7):H01L23/10 主分类号 H01L23/10
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