发明名称 |
Evaluation device for evaluating semiconductor device |
摘要 |
An evaluation device for evaluating a semiconductor device, used for evaluating electric characteristics of an electrical connection member provided in a vertical direction to a substrate surface, includes a unit circuit having a switching transistor in which a gate thereof connected to a signal line and one of a source and a drain thereof is connected to a first interconnect, and a first resistance element in which one terminal is connected to the other one of the source and the drain of the switching transistor and the other terminal is connected to a second interconnect. The first resistance element constituting each unit circuit includes at least one electrical connection member.
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申请公布号 |
US2004257104(A1) |
申请公布日期 |
2004.12.23 |
申请号 |
US20040869872 |
申请日期 |
2004.06.18 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
FUJINAGA SUGAO;MORIWAKI NOBUYUKI |
分类号 |
H01L21/66;G11C29/02;H01L21/3205;H01L23/52;(IPC1-7):G01R31/26 |
主分类号 |
H01L21/66 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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