SYSTEM PACKET INTERFACE

摘要

An apparatus including a first integrated circuit (IC) (202), a second IC (204), and an interface coupling the first IC to the second IC (200). The interface transfers payload control information between the first IC and the second IC utilizing a number of data transmission lines. On the clock cycle transition following the transfer of payload control information, the interface transfers packetized data between the first IC and the second IC a t a data rate of at least approximately 20Gbps utilizing the same transmission lines. A one-bit control signal is used by the interface to identify when payload control information is present on all of the data transmission lines .