发明名称 Performing virtual to global address translation in processing subsystem
摘要 A system may include a plurality of nodes. Each node may include one or more active devices coupled to one or more memory subsystems. Each active device in one of the plurality of nodes includes a memory management unit configured to receive a virtual address generated within that active device and to responsively output a global address and associated information that identifies a translation function. The memory subsystem in the one of the plurality of nodes is configured to apply the translation function identified in the information to the global address to generate a local physical address.
申请公布号 US2004260906(A1) 申请公布日期 2004.12.23
申请号 US20040817689 申请日期 2004.04.02
申请人 SUN MICROSYSTEMS, INC. 发明人 LANDIN ANDERS;HAGERSTEN ERIK E.
分类号 G06F12/02;G06F12/08;G06F12/10;(IPC1-7):G06F12/08 主分类号 G06F12/02
代理机构 代理人
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