发明名称 Memory module with improved data bus performance
摘要 A memory module is capable of constituting short loop-through form memory bus systems in which the length of the entire channel can be reduced. As a result, the systems are suitable for a high-speed operation, and costs for fabricating systems such as a board and a module connector can be reduced. The memory module includes a plurality of tabs located in one side of the front and in one side on the rear of the memory module, for being interconnected by a connector on a system board, a plurality of vias for connecting two different signal layers of the memory module, and a plurality of data buses extended from the tabs on the front of the memory module to the tabs on the rear of the memory module through each of the vias. At least one memory device is connected to each of the data buses. Preferably, each of the data buses is formed to be perpendicular to one side of the memory module on which the tabs are formed.
申请公布号 US2004260859(A1) 申请公布日期 2004.12.23
申请号 US20040883488 申请日期 2004.07.01
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 PARK MYUN-JOO;SO BYUNG-SE
分类号 G06F3/00;G06F12/00;G06F13/16;G11C5/00;H05K1/02;H05K1/11;H05K1/14;(IPC1-7):G11C5/00 主分类号 G06F3/00
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