发明名称 Method and apparatus for reducing power consumption of a processing integrated circuit
摘要 In a first aspect, a method is provided for conserving power in a processing integrated circuit. The method includes the steps of (1) calculating power consumption for executing an instruction and data corresponding to the instruction; and (2) executing the instruction if such execution does not exceed a predetermined power level. In a second aspect, a method is provided for conserving power in a processing integrated circuit employing a plurality of execution units. The method includes the steps of (1) comparing a total power to be consumed by the processing integrated circuit to a power budget for the processing integrated circuit; and (2) if the total power exceeds the power budget, freezing execution of an instruction by one of the plurality of execution units so as to allow execution of the instruction to continue at a later time from where execution was frozen. Numerous other aspects are provided, as are systems and apparatus.
申请公布号 US6834353(B2) 申请公布日期 2004.12.21
申请号 US20010682816 申请日期 2001.10.22
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 SMITH JACK ROBERT;VENTRONE SEBASTIAN THEODORE
分类号 G06F1/04;G06F1/32;G06F15/78;(IPC1-7):G06F1/32 主分类号 G06F1/04
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