发明名称 Semiconductor device
摘要 An NMOS transistor circuit has a surge protection circuit connected in parallel with the NMOS transistor. A resistor is connected between a back gate of the NMOS transistor and ground. As a result, an input impedance higher than the input impedance of the surge protection circuit is applied to a semiconductor terminal at the electrode pad side of the NMOS transistor.
申请公布号 US6833590(B2) 申请公布日期 2004.12.21
申请号 US20030378085 申请日期 2003.03.04
申请人 RENESAS TECHNOLOGY CORP. 发明人 MAKITA CHIKAO;KARASAWA KUNIHIKO
分类号 H01L27/02;(IPC1-7):H01L23/62;H01L29/74;H01L31/111;H01L29/00 主分类号 H01L27/02
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