发明名称 |
Microprocessor |
摘要 |
A microprocessor is provided whose power consumption is reduced optimally according to an execution instruction code and an operational mode. In addition to a first PLA used in a normal operation, a second PLA dedicated for execution of certain instructions frequently used in a slow mode is provided. When instruction codes and state signals to be executed in the slow mode match data set in the second PLA, the operation of the first PLA is stopped, and the microprocessor is controlled according to a microcode output from the second PLA.
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申请公布号 |
US6834339(B2) |
申请公布日期 |
2004.12.21 |
申请号 |
US20020138148 |
申请日期 |
2002.05.03 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
KONDO SHUJI;OKABE YOJI;ASADA HIROAKI |
分类号 |
G06F1/32;G06F9/30;G06F9/318;G06F9/38;G06F15/78;(IPC1-7):G06F9/46 |
主分类号 |
G06F1/32 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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