发明名称 Basic block cache microprocessor with instruction history information and method of execution and system thereof.
摘要 A processor, data processing system, and a related method of execution are disclosed. The processor is suitable for receiving a set of instructions and organizing the set of instructions into an instruction group. The instruction group is then dispatched for execution. Upon executing the instruction group, instruction history information indicative of an exception event associated with the instruction group is recorded. Thereafter, the execution of the instruction is modified responsive to the instruction history information to prevent the exception event from occurring during a subsequent execution of the instruction group. The processor includes a storage facility such as an instruction cache, an L2 cache or a system memory, a cracking unit, and a basic block cache. The cracking unit is configured to receive a set of instructions from the storage facility. The cracking unit is adapted to organize the set of instructions into an instruction group.
申请公布号 HK1035592(A1) 申请公布日期 2004.12.17
申请号 HK20010106104 申请日期 2001.08.29
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 JAMES ALLAN KAHLE
分类号 G06F9/38;G06F;G06F9/00;G06F9/30;G06F9/318;G06F12/08;(IPC1-7):G06F 主分类号 G06F9/38
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