发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To improve electric reliability, by using only high impurity concentration layers for the drains of P-channel MISFETs in a protecting circuit, and using low impurity concentration layers for the end parts of the channel regions of a P-channel MISFET in an inner circuit. CONSTITUTION:The drains of P-channel MISFETs Qp1 and Qp2 constituting a protecting circuit are formed only of high impurity concentration layers (p<+> type semiconductor regions 11). The drain of a P-channel MISFET Qp3 in an inner circuit is formed as follows: the end parts on the side of a channel region are formed of low impurity concentration layers (p-type semiconductor region 9); the other parts are formed with high purity concentration layers (p<+> type semiconductor regions 10). In this constitution, the P-channel MISFETs Qp1 and Qp2 in the input protecting circuit and the P-channel MISFET in the output protecting circuit are not damaged with the high temperature yielded at the surrounding parts of the drains at the time of breakdown. Deterioration in junction breakdown strength is prevented. Meanwhile, in the P-channel MISFET Qp3 in the inner circuit, generation of hot carriers at the end part of the drain is suppressed, and the short channel effect is suppressed.
申请公布号 JPH01220468(A) 申请公布日期 1989.09.04
申请号 JP19880044418 申请日期 1988.02.29
申请人 HITACHI LTD 发明人 SHIBATA TAKASHI
分类号 H01L27/06;H01L21/8234;H01L21/8246;H01L27/02;H01L27/088;H01L27/112;H01L29/78 主分类号 H01L27/06
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