| 摘要 |
PURPOSE:To decrease the time required for phase synchronization and to set a phase difference between an input sinusoidal wave and a clock signal to a desired phase difference accurately by controlling the phase of an oscillator output in response to an output of an arithmetic means so as to apply fine adjustment of the phase. CONSTITUTION:A clock signal S12 to be outputted is synchronized with a sinusoidal wave S11 with a phase difference close to a desired phase difference with respect to the input sinusoidal wave S11 with the selection of a sampling clock signal by a selector 5, and the fine adjustment of the phase is executed by controlling the phase of the output of the oscillator 3 in response to an output of an arithmetic means 20. Thus, the time required for phase synchronization is reduced and the phase difference between the input sinusoidal wave S11 and the clock signal S12 is set accurately to the desired phase difference. |
