发明名称 COUNTER CIRCUIT
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a necessary technique for observing communication packet traffic flowing through a high-speed network line with high time accuracy and a high time resolution. <P>SOLUTION: This counter circuit includes a first storage means; a second storage means; a selection means for selecting either of the first section means or the second selection means as a storage means on a write side; an accumulation means for storing into the storage means an accumulated value obtained by adding an input value to a value stored in the storage means on the write side; and a readout means for reading out the accumulated value stored in the storage means which has not been selected as the storage means on the write side out of the first storage means and the second storage means. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p>
申请公布号 JP2004357148(A) 申请公布日期 2004.12.16
申请号 JP20030154801 申请日期 2003.05.30
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 MUROOKA TAKAHIRO
分类号 H04L12/70;(IPC1-7):H04L12/56 主分类号 H04L12/70
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