SILICON-ON-INSULATOR DEVICE

摘要

A Silicon on Insulator (SOI) device is disclosed wherein an extension of P-type doping (303) is implanted between the buried oxide layer of the device and the SOI layer. The extension is of a size and shape to permit the source (309) to be biased at a voltage significantly less than the handler wafer (304) and drain, a condition under which prior art SOI devices may not properly operate.