发明名称 |
DIGITAL SYSTEM, CLOCK SIGNAL ADJUSTING METHOD FOR DIGITAL SYSTEM, RECORDING MEDIUM RECORDING PROCESSING PROGRAM EXECUTED IN THE ADJUSTING METHOD |
摘要 |
<p>A digital system (1) which performs a digital processing according to a single or a plurality of clock signals to deliver a specified basic function, and which comprises a plurality of delay elements (4) respectively inserted into a plurality of clock circuits for supplying clock signals in a digital system, and respectively constituted by circuit elements for changing delay times according to values indicated by a control signal, and a plurality of holding circuits (5) for holding a plurality of control signals to be given to a plurality of delay elements. The plurality of holding circuits have a plurality of control signal values, held by these holding circuits, changed by external devices (6-8) according to a probabilistic search method with the digital system (1) supplied with power from a variable-output-voltage power supply (14) so that the basic function of the digital system satisfies specified specifications.</p> |
申请公布号 |
WO2004109916(A1) |
申请公布日期 |
2004.12.16 |
申请号 |
WO2004JP07683 |
申请日期 |
2004.06.03 |
申请人 |
NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE;TAKAHASHI, EIICHI;MURAKAWA, MASAHIRO;KASAI, YUJI;HIGUCHI, TETSUYA |
发明人 |
TAKAHASHI, EIICHI;MURAKAWA, MASAHIRO;KASAI, YUJI;HIGUCHI, TETSUYA |
分类号 |
G06F1/10;G01R31/317;H03K5/00;(IPC1-7):H03K5/00 |
主分类号 |
G06F1/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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