ARRAY SUBSTRATE FOR REDUCING PARASITIC CAPACITANCE BETWEEN A FLOATING GATE AND A DATA LINE, A METHOD FOR MANUFACTURING THE SAME, AND AN LCD COMPRISING THE SAME

摘要

PURPOSE: An array substrate, a method for manufacturing the same, and an LCD(Liquid Crystal Display) comprising the same are provided to reduce parasitic capacitance between a floating gate and a data line, thereby reducing the consumption of the electric power and preventing a cross-talk defect by forming an opening part in the floating gate. CONSTITUTION: A floating gate(301) is formed and then an opening part(302) is formed in the floating gate by removing the center portion of the floating gate. The opening part has the first width(d1). A data line(102) is formed over the floating gate at the first distance, wherein the data line has the second width(d2). When the second width is larger than the first width, the light passed through the opening part is blocked. A pixel electrode(103) is formed over the gate line at the second distance, wherein the second distance is larger than the first distance.