| 摘要 |
A fault tolerant data storage circuit for an integrated circuit produces a specified initial output state with high probability even in the presence of abnormal start-up conditions affecting one or more signal inputs to the storage circuit. The storage circuit includes a plurality of storage elements, such as flip-flops, latches, or static PAM cells, each acting as a redundant element for the others. The storage elements are constructed to normally assume a preferred initial state. All storage elements are clocked by a common clock line and loaded at their data inputs from a common data input line of the storage circuit. A logic gate, such as an AND gate combines the storage element outputs and outputs the correct initial state, unless all storage elements happen to be in the wrong state, which is an extremely low probability event.
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