发明名称 |
SEMICONDUCTOR DEVICE AND FABRICATING METHOD FOR RESTRICTING INCREASE OF CAPACITANCE BETWEEN LINES BY REMOVING HIGH-RESISTANCE LAYER WITH REDUCTIVE GAS |
摘要 |
PURPOSE: A semiconductor device and a fabricating method thereof are provided to restrict an increase of capacitance between lines and reduce leakage current by removing a high-resistance layer with a reductive gas. CONSTITUTION: A stopper layer(3) is formed on a metal line. An interlayer dielectric(6) is formed on the stopper layer. The interlayer dielectric has Young's modulus of 7 GPa or more and a relative dielectric constant of 3 or less. An opening part approaching the stopper layer is formed by etching the interlayer dielectric. A via hole(10) is formed by etching an exposed part of the stopper layer. The metal line is exposed. A line groove(11) is formed by etching the interlayer dielectric. A plasma process for a surface of the exposed metal line is performed by using a reductive gas.
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申请公布号 |
KR20040105578(A) |
申请公布日期 |
2004.12.16 |
申请号 |
KR20040041096 |
申请日期 |
2004.06.05 |
申请人 |
SEMICONDUCTOR LEADING EDGE TECHNOLOGIES, INC. |
发明人 |
OHTSUKA, NOBUYUKI;OKAMURA, HIROSHI;SONE, SHUJI |
分类号 |
H01L21/768;H01L21/31;H01L21/3205;H01L23/52;H01L23/522;(IPC1-7):H01L21/31 |
主分类号 |
H01L21/768 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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