发明名称 Nonvolatile memory, verify method therefor, and semiconductor device using the nonvolatile memory
摘要 Provided is a nonvolatile memory that realizes a high-speed verify operation. During verify writing/erasing, the writing/erasing and reading are performed at the same time. As to a circuit that performs a verify operation, for instance, there is obtained a construction where the output from a sense amplifier (102) that performs reading is connected to a switch which switches an operation voltage applied to a memory cell in accordance with a verify signal Sv, and the verify operation is finished concurrently with having the verify signal Sv switched. By obtaining such circuit construction and simultaneously performing writing/erasing and reading, it becomes possible to perform high-speed verify writing/erasing.
申请公布号 US2004252567(A1) 申请公布日期 2004.12.16
申请号 US20040822388 申请日期 2004.04.12
申请人 SEMICONDUCTOR ENERGY LABORATORY CO., LTD. 发明人 KATO KIYOSHI
分类号 G11C16/02;G11C16/04;G11C16/34;(IPC1-7):G11C5/00 主分类号 G11C16/02
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