发明名称 CFAR CIRCUIT
摘要 <p>PURPOSE:To achieve a higher freedom by controlling the number of averaging cells and guard cells in substance by an external control with a simple circuit. CONSTITUTION:First, selectors 32c and 31c output zeroes under control of a Constant False Alarm Rate (CFAR) control circuit 35 and data a0, a1... and aM are supplied to a terminal I of an adder 30. The data are added up and an initial value A(0)=a0+a1+...+aM is taken out at a terminal II to be stored into RAMs 32a and 31a. When the data A(0) arrives at the terminal I, a data aM+1 at the terminal II and a data a0 at the terminal III, a sector 30d selects the data arriving at the terminal II under control of the circuit 35. On the other hand, a selector 30e selects the data arriving at the terminal I under control of the circuit 35 and a selector 20f performs an adding operation in which no output of an adder 30c is selected and a subtracting operation of the selectors 30d and 30f at different timings using only one adder 30c.</p>
申请公布号 JPH03248076(A) 申请公布日期 1991.11.06
申请号 JP19900046392 申请日期 1990.02.27
申请人 FUJITSU LTD 发明人 TAMAI KAZUKI;FUJIKAWA SHINICHI
分类号 G01S7/32 主分类号 G01S7/32
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