Dynamically adaptable memory controller for various size memories

摘要

There is disclosed a system and method for operating a memory controller in a manner which will allow memories with differing address sizes to be connected to a common bus. The controller decodes address information to change from a determined default address size to another address size on a dynamic basis during the actual memory access cycle. Upon detection of larger memory size, an adjustment occurs in the presentation of address information on the common address bus.