发明名称 METHODS OF FORMING AN ISOLATION TRENCH IN A SEMICONDUCTOR, METHODS OF FORMING AN ISOLATION TRENCH IN A SURFACE OF A SILICON WAFER, METHODS OF FORMING AN ISOLATION TRENCH-ISOLATED TRANSISTOR, TRENCH-ISOLATED TRANSISTOR, TRENCH ISOLATION STRUCTURES FORMED IN A SEMICONDUCTOR, MEMORY CELLS AND DRAMS
摘要 A method of forming an isolation trench in a semiconductor includes forming a first isolation trench portion having a first depth and having a first sidewall intersecting a surface of the semiconductor at a first angle. The method also includes forming a second isolation trench portion within and extending below the first isolation trench portion. The second isolation trench portion has a second depth and includes a second sidewall. The second sidewall intersects the first sidewall at an angle with respect to the surface that is greater than the first angle. A dielectric material fills the first and second isolation trench portions.
申请公布号 US6830977(B1) 申请公布日期 2004.12.14
申请号 US20000652550 申请日期 2000.08.31
申请人 MICRON TECHNOLOGY, INC. 发明人 JONO KEIJI;UEDA HIROKAZU;WATANABE HIROYUKI
分类号 H01L21/762;H01L21/8242;(IPC1-7):H01L21/336 主分类号 H01L21/762
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