发明名称 Cache thresholding method, apparatus, and program for predictive reporting of array bit line or driver failures
摘要 A mechanism is provided for predicting cache array bit line or driver failures. This mechanism checks for five consecutive errors at different addresses within the same syndrome on invocation of event scan polling to characterize the failure. Once the failure is characterized, it is reported to the system for corrective maintenance including dynamic and/or boot time processor deconfiguration or preventive processor replacement.
申请公布号 US6832329(B2) 申请公布日期 2004.12.14
申请号 US20010779365 申请日期 2001.02.08
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 AHRENS GEORGE HENRY;KITAMORN ALONGKORN;MCLAUGHLIN CHARLES ANDREW;VADEN MICHAEL THOMAS
分类号 G06F12/08;G06F11/00;G06F11/07;G06F11/32;G06F12/16;G11C29/00;G11C29/42;(IPC1-7):G06F11/00 主分类号 G06F12/08
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