发明名称 Memory auto-precharge
摘要 A computer system includes a plurality of memory modules that contain semiconductor memory, such as DIMMs. The system includes a host/data controller that utilizes an XOR engine to store data and parity information in a striped fashion on the plurality of memory modules to create a redundant array of industry standard DIMMs (RAID). To optimally run back to back cycles to the memory modules, a technique for providing de-rating parameters such that unnecessary latencies designed into the memory devices can be removed while the system is executing requests. By removing any unnecessary latency, cycle time and overall system performance can be improved.
申请公布号 US6832286(B2) 申请公布日期 2004.12.14
申请号 US20020179081 申请日期 2002.06.25
申请人 HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. 发明人 JOHNSON JEROME J.;CLARK BENJAMIN H.;PICCIRILLO GARY J.;MACLAREN JOHN M.
分类号 G06F12/00;G06F13/42;(IPC1-7):G06F12/00 主分类号 G06F12/00
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