发明名称 |
High-level synthesis apparatus, high-level synthesis method, method for producing logic circuit using the high-level synthesis method, and recording medium |
摘要 |
A high-level synthesis apparatus for synthesizing a register transfer level logic circuit from a behavioral description describing a processing operation of the circuit, comprises a low power consumption circuit generation section for generating a low power consumption circuit which stops or inhibits circuit operations of partial circuits constituting the logic circuit only when the partial circuits are in a wait state, so to achieve low power consumption. The low power consumption circuit generation section is synthesized along with the logic circuit.
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申请公布号 |
US6832363(B2) |
申请公布日期 |
2004.12.14 |
申请号 |
US20020166094 |
申请日期 |
2002.06.11 |
申请人 |
SHARP KABUSHIKI KAISHA |
发明人 |
OHNISHI MITSUHISA |
分类号 |
G06F17/50;H03K19/00;(IPC1-7):G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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