发明名称 |
FORMING METHOD OF GATE ELECTRODE USING RECESS REGION IN CONDUCTIVE LAYER FOR FORMING GATE ELECTRODE AND DIELECTRIC SPACER AT SIDE WALL OF RECESS REGION |
摘要 |
PURPOSE: A forming method of a gate electrode is provided to reduce notch defect, thereby obtaining a gate electrode having a smooth profile by using a recess region in a conductive layer for forming a gate electrode and a dielectric spacer at the side wall of the recess region before completing the formation of the gate electrode. CONSTITUTION: A gate insulating layer(20) is formed on a semiconductor substrate(10). A conductive layer(30) is formed on the gate insulating layer. A capping pattern(41) is formed on the conductive layer. The portion of the conductive layer is etched using the capping pattern as a mask, thereby forming a recess region(31) in the conductive layer. A dielectric spacer(51) is formed at the side wall of the recess region. The remaining conductive layer is etched using the capping pattern and the dielectric spacer as a mask, thereby exposing the gate insulating layer and forming the gate electrode.
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申请公布号 |
KR20040105153(A) |
申请公布日期 |
2004.12.14 |
申请号 |
KR20030036442 |
申请日期 |
2003.06.05 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
JU, JUN YONG;KIM, SEONG JIN |
分类号 |
H01L21/336;(IPC1-7):H01L21/336 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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