发明名称 WRITE DRIVER CIRCUIT OF A PHASE CHANGE MEMORY DEVICE, ESPECIALLY CONTROLLING THE LEVEL OF CURRENT SUPPLIED TO THE PHASE CHANGE MEMORY DEVICE
摘要 PURPOSE: A write driver circuit of a phase change memory device is provided to select the reset pulse or the set pulse in response to the logic level of the data. CONSTITUTION: A write driver circuit of a phase change memory device includes a pulse selection circuit(510), a current control circuit(520) and a current driving circuit(530). The pulse selection circuit outputs one of the reset pulse and the set pulse and the data in response to the logic level of the data. The current control circuit receives the bias voltage, outputs the control signal as the second level during the enable period of the reset pulse when the data is a first level and outputs the control signal as a first level during the enable period of the set pulse when the data is second level. And, the current driving circuit outputs the write current to the phase change memory device array through the first node in response to the control signal during the enable period of the reset pulse or the set pulse and discharges the first node during the disable period of the reset pulse or the set pulse.
申请公布号 KR20040105008(A) 申请公布日期 2004.12.14
申请号 KR20030035607 申请日期 2003.06.03
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 CHO, BAEK HYEONG;CHO, U YEONG;OH, HYEONG ROK
分类号 G11C7/00;G11C7/10;G11C16/02;(IPC1-7):G11C7/00 主分类号 G11C7/00
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