SEMICONDUCTOR MEMORY DEVICE FOR OUTPUTTING DATA BITS WITH LOWER RATE IN TEST MODE AND METHOD FOR OPERATING THE SAME, ESPECIALLY INCLUDING A MEMORY CELL OUTPUTTING DATA BIT IN PARALLEL

摘要

PURPOSE: A semiconductor memory device for outputting data bits with lower rate in a test mode and a method for operating the same are provided to expand the effective output data window in the test mode by outputting data bits with lower rate than that of the normal mode. CONSTITUTION: A semiconductor memory device for outputting data bits with lower rate in a test mode includes a memory cell array(211) and an output circuit(213). The memory cell array outputs a plurality of data bits with a first data rate in parallel. And, the output circuit outputs the plurality of the data bits to the external terminal with the first data rate in serial in a normal mode and outputs the plurality of the data bits to the external terminal with a second data rate lower than the first data rate in the test mode.