发明名称 BLOCK CONVERSION CODE CODER AND DECODER
摘要 <p>PURPOSE:To predict an erroneous important word with high accuracy in the block conversion coding such as ADRC. CONSTITUTION:A motion detection circuit 5 detects a motion at every block at the time of coding and records a motion flag together with coded data. A motion flag is given to a memory 24 at the time of decoding to switch data used for prediction. That is, when an important word of a remarkable block has an error and the remarkable block is a motion block, data belonging to a same filed only are used as prediction data, and when the remarkable block is a still block, data without belonging to the same field are also used. Thus, an important word is predicted with high accuracy even in a motion block or a still block.</p>
申请公布号 JPH06253287(A) 申请公布日期 1994.09.09
申请号 JP19930059704 申请日期 1993.02.24
申请人 SONY CORP 发明人 UCHIDA MASASHI;KONDO TETSUJIRO;NAKAYA HIDEO
分类号 H03M13/00;G06T9/00;H04N5/92;H04N19/102;H04N19/105;H04N19/132;H04N19/136;H04N19/137;H04N19/166;H04N19/167;H04N19/176;H04N19/186;H04N19/196;H04N19/423;H04N19/46;H04N19/50;H04N19/51;H04N19/59;H04N19/625;H04N19/65;H04N19/67;H04N19/70;H04N19/85;H04N19/86;H04N19/88;H04N19/89;H04N19/895;H04N19/98;(IPC1-7):H04N7/137;G06F15/66 主分类号 H03M13/00
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