发明名称 CIRCUIT BOARD AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To solve the problem that an IC package substrate made by an etch back method has no compatibility with high-density wiring and has a low reliability due to the exposure of copper outside a sealing section of an IC package and has a low yield, since an electrolytic plating wire has a problem such as a large etching thickness, and at the same time an electroless plating method has a problem such as lacking in bonding stability and being expensive. SOLUTION: In the IC package substrate, an electrolytic pattern and an exposure pattern are formed of solder resist, and a temporary electrolytic plating wire is formed by electroless plating, and then an opening is formed in the electrolytic pattern by a resist and the pattern is electrolytically plated, resulting in making the etching thickness of the electrolytic plating wire small and enabling high-density wiring. Consequently, a low-cost and reliable IC package substrate with a good bonding stability can be obtained. A problem of a poor pattern positional accuracy can be solved by not directly connecting the electrolytic pattern and the exposure pattern. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2004349414(A) 申请公布日期 2004.12.09
申请号 JP20030143801 申请日期 2003.05.21
申请人 NAGASE & CO LTD 发明人 ISHIDA YOSHIHIRO
分类号 H05K3/28;H01L23/52;H05K3/24;(IPC1-7):H05K3/24 主分类号 H05K3/28
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