发明名称 |
Intelligent crosstalk delay estimator for integrated circuit design flow |
摘要 |
A method of estimating crosstalk delay for an integrated circuit design flow includes steps of: (a) receiving an integrated circuit design; (b) selecting a list of blocks for which crosstalk delay is to be estimated from the integrated circuit design; (c) selecting one of a plurality of crosstalk delay estimation algorithms or no crosstalk delay estimation algorithm for each block in the list of blocks; (d) performing the selected one of the plurality of crosstalk delay estimation algorithms or no crosstalk delay estimation algorithm to estimate a delay for each block in the list of blocks; and (e) generating as output the estimated delay for each block in the list of blocks.
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申请公布号 |
US2004250225(A1) |
申请公布日期 |
2004.12.09 |
申请号 |
US20030458547 |
申请日期 |
2003.06.09 |
申请人 |
TETELBAUM ALEXANDER;HUYNH DUC VAN |
发明人 |
TETELBAUM ALEXANDER;HUYNH DUC VAN |
分类号 |
G06F9/45;G06F17/50;(IPC1-7):G06F9/45 |
主分类号 |
G06F9/45 |
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