发明名称 Method for forming electroless metal low resistivity interconnects
摘要 A process for forming electroless metal conductors in an integrated circuit as part of, for example, a damascene or dual damascene process without the use of a seed layer, is described. A catalyst is used to cause the via openings and trenches to be filled from the bottom up, thereby minimizing voids.
申请公布号 US2004248403(A1) 申请公布日期 2004.12.09
申请号 US20030458042 申请日期 2003.06.09
申请人 DUBIN VALERY M.;MOON PETER K. 发明人 DUBIN VALERY M.;MOON PETER K.
分类号 H01L21/288;H01L21/768;(IPC1-7):H01L21/476 主分类号 H01L21/288
代理机构 代理人
主权项
地址