发明名称 POWER-ON RESET CIRCUIT DEVICE
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a power-on reset circuit device capable of reducing current consumption substantially. <P>SOLUTION: A current path control circuit 37 shuts down a current path flowing through a resistor 1 and turns off a FET 3 to maintain a release state of power-on reset (POR) by a NAND gate 16 if a regular current cut signal becomes active, while the circuit secures the current path during the normal operation of a POR circuit device 38 when the signal becomes inactive. When a POR signal reaches a high-level and it is in a reset release state, a capacitor 32 is charged through a resistor 31. If a terminal voltage of the capacitor 32 exceeds a predetermined threshold level, an OR gate 36 outputs a high level signal and the current path control circuit 37 shuts down the current path. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p>
申请公布号 JP2004350126(A) 申请公布日期 2004.12.09
申请号 JP20030146296 申请日期 2003.05.23
申请人 DENSO CORP 发明人 IWATSUKI MASASHI
分类号 G06F1/24;H03K17/22;(IPC1-7):H03K17/22 主分类号 G06F1/24
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