HIGHER-ORDER SYNTHESIZER, MODEL CREATION METHOD FOR HARDWARE VERIFICATION, AND HARDWARE VERIFICATION METHOD

摘要

PROBLEM TO BE SOLVED: To create a general purpose programming language model for verifying hardware in a clock cycle unit without using any HDL simulator. SOLUTION: In a higher-order synthesizer for performing higher-order synthesizing of hardware at a register transfer level from action analysis information acquired from analysis of action description, a cycle accurate model creation part 113 creates a calculation formula for calculating a register status and a calculation formula for calculating a controller status from action information of components to which action is allocated, data path information showing connection between the components, and status transition information about a controller. A cycle accurate model is created by using the created calculation formulas as description based on a general purpose programming language for verifying hardware at a cycle accurate level. COPYRIGHT: (C)2005,JPO&NCIPI