SEMICONDUCTOR AND ITS MANUFACTURING METHOD

摘要

A pMOS transistor capable of decreasing the height of a gate electrode, suppressing the punch-through of boron penetrating a gate insulation film, and decreasing the source/drain parasitic capacitance. A method for manufacturing a semiconductor device comprises (a) the step of forming a gate insulation film on a semiconductor substrate including a first-conductivity-type active region demarcated by an element isolating region, (b) the step of depositing a gate electrode layer of polycrystalline semiconductor on the gate insulation film, (c) the step of transforming the top portion of the gate electrode layer into an amorphous layer by ion implantation of impurities, (d) the step of forming a gate electrode by patterning the gate electrode layer, (e) the step of forming a side wall spacer on the gate electrode side wall at a temperature at which the amorphous layer is not crystallized, and (f) the step of forming a heavily doped source/drain region by ion implantation of second-conductivity-type impurities to the first-conductivity-type active region using the gate electrode and the side wall spacer as a mask.