METHOD FOR FORMING METAL LINE OF SEMICONDUCTOR DEVICE BY USING DAMASCENE METHOD

摘要

PURPOSE: A method for forming a metal line of a semiconductor device by using a damascene method is provided to enhance the reliability by minimizing critical dimension of a via contact and improving a leakage current characteristic between metal lines. CONSTITUTION: The first interlayer dielectric is formed over a semiconductor substrate to expose a lower metal line. A stacked structure of the first etch-stop layer(45), the second interlayer dielectric(47), the second etch-stop layer(49), the third interlayer dielectric(51), and an anti-reflective layer(53) is formed over an entire surface of the semiconductor substrate. A via contact hole is formed by etching the stacked structure. The lower metal line is exposed by etching the first etch-stop layer. A photoresist layer pattern is formed over a bottom of the via contact hole. An upper metal line region(61) is formed by etching the anti-reflective layer and the third interlayer dielectric. The remaining photoresist layer and the photoresist layer pattern are removed therefrom.