发明名称 PACKAGE FOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To reduce the signal path to reduce the delay by placing a connection device on a first surface of circuit board and by electrically connecting integrated circuit chips on a second surface of the circuit board through the connection device to reduce the distance between the chips. SOLUTION: On a first surface of a circuit board 122, connection device composed of wires 118 is disposed. Solder balls 100 are connected to the wires 118 and an integrated circuit i.e., semiconductor die 114 disposed by tracing on a second surface of the board 112 such that the wires 118 on the first surface of the board 122 are adhered to the die 122 at the side facing or contacting the board 122. The wires 118 leave the die 114, pass through holes 120 of the board 122 to adhere to a trace, and is connected to the balls 100 along the board 122.
申请公布号 JPH1092972(A) 申请公布日期 1998.04.10
申请号 JP19970138446 申请日期 1997.05.28
申请人 TEXAS INSTR INC <TI> 发明人 GOH JING S
分类号 H05K1/18;H01L23/12;H01L23/31;H01L23/495;H01L23/498 主分类号 H05K1/18
代理机构 代理人
主权项
地址