发明名称
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device in which the multilayer wiring layer equipped with a capacitor can be flattened and processed finely and besides which is excellent in electric property, and its manufacturing method. SOLUTION: This method is one which forms a contact hole in the selective region of an insulating film 11 after the insulating film 11 on a semiconductor substrate 1 where a plurality of semiconductor devices such as CMOSFET or the like are made, and fills a contact hole with a plug consisting of the stack film of a titanium nitride film 14 and a tungsten film 15, or a titanium nitride film 14. Furthermore, this forms the upper electrode 18 of the capacitor after piling of the insulating film 17 to serve as the dielectric film of the capacitor on the semiconductor substrate 1 including the lower electrode 16 after formation of the lower electrode 16 of a capacitor on the plug.
申请公布号 JP3599504(B2) 申请公布日期 2004.12.08
申请号 JP19960315806 申请日期 1996.11.27
申请人 发明人
分类号 H01L29/43;H01L21/28;H01L21/822;H01L21/8238;H01L21/8242;H01L21/8244;H01L27/04;H01L27/092;H01L27/108;H01L27/11 主分类号 H01L29/43
代理机构 代理人
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