发明名称 |
SEMICONDUCTOR DEVICE FOR EMPLOYING METHOD FOR DESIGN OF NANOMETER SCALE DEVICE |
摘要 |
PURPOSE: A semiconductor device for employing a method for a design of a nanometer scale device is provided to form a channel with a high-resistivity region having an impurity concentration of 10¬17 cm¬-3 or less by selecting a work function of a gate material. CONSTITUTION: A silicon pillar has a high-resistivity region and first and second highly doped regions formed at both sides of the high-resistivity region. The high-resistivity region has an impurity concentration of 10¬17 cm¬-3 or less. An insulator is used surrounding the high-resistivity region. A conductor is used surrounding the insulator. The conductor is made of a material which permits a voltage applied to the conductor to control an electric current flowing between first and second highly doped regions. The material has a work function bringing the high-resistivity region to a perfect depletion condition during the flow of the electric current between the first and the second highly doped regions.
|
申请公布号 |
KR20040103416(A) |
申请公布日期 |
2004.12.08 |
申请号 |
KR20040038201 |
申请日期 |
2004.05.28 |
申请人 |
MASUOKA FUJIO;SHARP CORPORATION |
发明人 |
MASUOKA FUJIO;SAKURABA, HIROSHI;YAMAMOTO, YASUE |
分类号 |
H01L21/336;H01L29/423;H01L29/49;H01L29/78;H01L29/786;(IPC1-7):H01L21/336 |
主分类号 |
H01L21/336 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|