发明名称 Process for high voltage oxide and select gate poly for split-gate flash memory
摘要 A process for forming a high voltage oxide (HV) and a select gate poly for a split-gate flash memory is disclosed. The general difficulty of forming oxides of two different thicknesses for two different areas on the same substrate is alleviated by forming an HV oxide layer over the entire substrate just prior to the forming of the control gate of a cell area after the forming of a gate oxide layer over the peripheral area of the substrate. At an immediate subsequent step, a peripheral gate is formed over the HV oxide over the peripheral area, and, as a final step, the forming of the control gate, or the select gate of the cell area follows next.
申请公布号 US6828183(B1) 申请公布日期 2004.12.07
申请号 US20020120834 申请日期 2002.04.11
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY 发明人 SUNG HUNG CHENG;CHEN HAN-PING;HSU CHENG YUAN
分类号 H01L21/8238;H01L21/8247;H01L27/105;H01L27/115;(IPC1-7):H01L21/823 主分类号 H01L21/8238
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