发明名称 OUTPUT BUFFER CIRCUIT HAVING TEST SIGNAL PATH AND TEST METHOD FOR ESTIMATING FEATURES OF THE SAME
摘要 PURPOSE: An output buffer circuit having a test signal path and a test method for estimating features of the same are provided to precisely estimate the features of an output buffer without influence of an internal logic circuit by directly applying a test signal of a DC voltage level matched with a current driving capacity of the output buffer to the output buffer through the test signal path. CONSTITUTION: A semiconductor device(400) includes the output buffers(432) and a test signal input circuit(431). The test signal input circuit is switched to a test mode or a normal mode by responding to a control signal received through the first control pin(403). In the test mode, the test signal input circuit outputs the test signal inputted through the second control pin(404) to the output buffers. In the normal mode, the test signal input circuit outputs internal output signals received from an internal logic circuit(420) to the output buffers. The output buffers output an output signal of a high or low state to the output pin by responding to the internal output signal or the test signal.
申请公布号 KR20040101660(A) 申请公布日期 2004.12.03
申请号 KR20030033349 申请日期 2003.05.26
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 CHOI, SI YEONG
分类号 G01R31/317;(IPC1-7):G06F11/00 主分类号 G01R31/317
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