发明名称 Mute circuit and BTL audio amplifier apparatus
摘要 In the present invention, a BTL circuit formed in an IC is constituted in such a manner that a second output stage amplifier receives an output of a first output stage amplifier and generates an inverted output and a switch circuit is provided between any one of the outputs of the first and second output stage amplifier and a speaker, wherein through effecting a muting by making use of a delay time of BTL operation of the second output stage amplifier or alternatively, by making use of switches of respective push-pull structured transistors in place of the switch circuit, an early muting from the time of power source turning ON can be realized.
申请公布号 US2004239418(A1) 申请公布日期 2004.12.02
申请号 US20040849056 申请日期 2004.05.20
申请人 INAGAKI RYOSUKE 发明人 INAGAKI RYOSUKE
分类号 H03F1/30;H03G3/34;(IPC1-7):H04B15/00;H03F1/14 主分类号 H03F1/30
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